ALLGEMEINE BESCHREIBUNG

The ADP1754/ADP1755 are low dropout (LDO) CMOS linear regulators that operate from 1.6 V to 3.6 V and provide up to 1.2 A of output current. These low VIN/VOUT LDOs are ideal for regulation of nanometer FPGA geometries operating from 2.5 V down to 1.8 V I/O rails, and for powering core voltages down to 0.75 V. Using an advanced proprietary architecture, the ADP1754/ ADP1755 provide high power supply rejection ratio (PSRR) and low noise, and achieve excellent line and load transient response with only a small 4.7 µF ceramic output capacitor.

The ADP1755 is the adjustable version, which allows output voltages that range from 0.75 V to 3.3 V via an external divider. The ADP1754/ADP1755 allow an external soft start capacitor to be connected to program the startup. A digital power-good output allows power system monitors to check the health of the output voltage.

The ADP1754/ADP1755 are available in a 16-lead, 4 mm × 4 mm LFCSP, making them not only very compact solutions, but also providing excellent thermal performance for applications that require up to 1.2 A of output current in a small, low profile footprint.

 

Ausgangskondensator

The ADP1754/ADP1755 are designed for operation with small, space-saving ceramic capacitors, but they can function with most commonly used capacitors as long as care is taken with the effective series resistance (ESR) value. The ESR of the output capacitor affects the stability of the LDO control loop. A minimum of 3.3 μF capacitance with an ESR of 500 mΩ or less is recommended to ensure the stability of the ADP1754/ADP1755. Transient response to changes in load current is also affected by output capacitance. Using a larger value of output capacitance improves the transient response of the ADP1754/ADP1755 to large changes in load current.

 

CURRENT-LIMIT AND THERMAL OVERLOAD

The ADP1754/ADP1755 are protected against damage due to excessive power dissipation by current-limit and thermal overload protection circuits. The ADP1754/ADP1755 are designed to reach current limit when the output load reaches 2 A (typical). When the output load exceeds 2 A, the output voltage is reduced to maintain a constant current limit.

Thermal overload protection is included, which limits the junction temperature to a maximum of 150°C (typical). Under extreme conditions (that is, high ambient temperature and power dissipation) when the junction temperature begins to rise above 150°C, the output is turned off, reducing the output current to zero. When the junction temperature drops below 135°C (typical), the output is turned on again and the output current is restored to its nominal value.

Consider the case where a hard short from VOUT to ground occurs. At first, the ADP1754/ADP1755 reach current limit so that only 2 A is conducted into the short. If self-heating of the junction becomes great enough to cause its temperature to rise above 150°C, thermal shutdown activates, turning off the output and reducing the output current to zero. As the junctiontemperature cools and drops below 135°C, the output turns on and conducts 2 A into the short, again causing the junction temperature to rise above 150°C. This thermal oscillation between 135°C and 150°C causes a current oscillation between 2A and 0 A that continues as long as the short remains at the output.Current-limit and thermal overload protections are intended to protect the device against accidental overload conditions. For reliable operation, device power dissipation should be externally limited so that junction temperatures do not exceed 125°C.

 

THERMAL CONSIDERATIONS

To guarantee reliable operation, the junction temperature of the ADP1754/ADP1755 must not exceed 125°C. To ensure that the junction temperature stays below this maximum value, the user needs to be aware of the parameters that contribute to junction temperature changes. These parameters include ambient temperature, power dissipation in the power device, and thermal resistance between the junction and ambient air (θJA). The θJA value is dependent on the package assembly compounds used and the amount of copper to which the GND pin and the exposed pad (EPAD) of the package are soldered on the PCB.