DESCRIPCIÓN GENERAL

The AD7768-CHIPS is an 8-channel simultaneous sampling sigma-delta (Σ-Δ) analog-to-digital converter (ADC) with a Σ-Δ modulator and digital filter per channel, enabling synchronized sampling of ac and dc signals.
The AD7768-CHIPS achieves 108 dB dynamic range at a maximum input bandwidth of 110.8 kHz, combined with a typical performance of ±2 ppm integral nonlinearity (INL), ±50 μV offset error, and ±30 ppm of full-scale range (FSR) gain error.
The AD7768-CHIPS user can trade off input bandwidth, output data rate (ODR), and power dissipation, and select one of three power modes to optimize for noise targets and power consumption. The flexibility of the AD7768-CHIPS allows the device to become a reusable platform for low power dc and high performance ac measurement modules.
The AD7768-CHIPS has three modes: fast mode (256 kSPS maximum, 110.8 kHz input bandwidth), median mode (128 kSPS maximum, 55.4 kHz input bandwidth) and low power mode (32 kSPS maximum, 13.8 kHz input bandwidth).
The AD7768-CHIPS offers extensive digital filtering capabilities, such as a wideband, a low ±0.005 dB pass-band ripple, an antialiasing low-pass filter with sharp roll-off, and 105 dB stop band attenuation at the Nyquist frequency.
Frequency domain measurements can use the wideband linear phase filter. This filter has a flat pass band (±0.005 dB ripple) from dc to 102.4 kHz at 256 kSPS, from dc to 51.2 kHz at 128 kSPS, or from dc to 12.8 kHz at 32 kSPS.
The AD7768-CHIPS also offers sinc response via a sinc5 filter, a low latency path for low bandwidth, and low noise measurements. The wideband and sinc5 filters can be selected and run on a per channel basis.
Within these filter options, the user can improve the dynamic range by selecting from decimation rates of ×32, ×64, ×128, ×256, ×512, and ×1024. The ability to vary the decimation filtering optimizes noise performance to the required input bandwidth.
Embedded analog functionality on each ADC channel makes design easier, such as a precharge buffer on each analog input that reduces analog input current and a precharge reference buffer per channel that reduces input current and glitches on the reference input terminals.
The device operates with a 5 V AVDD1A and AVDD1B supply, a 2.25 V to 5.0 V AVDD2A and AVDD2B supply, and a 2.5 V to 3.3 V or 1.8 V IOVDD supply.
The device requires an external reference. The absolute input reference voltage range is 1 V to AVDD1 − AVSS.
For the purposes of clarity in this data sheet, the AVDD1A and AVDD1B supplies are referred to as AVDD1, and the AVDD2A and AVDD2B supplies are referred to as AVDD2. For the negative supplies, AVSS refers to the AVSS1A, AVSS1B, AVSS2A, AVSS2B, and AVSS pins.
The specified operating temperature range is −40°C to +105°C.
Throughout this data sheet, multifunction pins, such as XTAL2/MCLK, are referred to either by the entire pin name or by a single function of the pin, for example MCLK, when only that function is relevant.
Additional application and technical information can be found in the AD7768 data sheet.

 

CARACTERÍSTICAS

Precision ac and dc performance
8-channel simultaneous sampling 256 kSPS maximum ADC ODR per channel
108 dB dynamic range −120 dB THD, typical ±2 ppm of FSR INL, ±50 μV offset error, ±30 ppm of FSR gain error
Optimized power dissipation vs. noise vs. input bandwidth
Selectable power, speed, and input bandwidth
Input bandwidth range up to 110.8 kHz (−3 dB bandwidth)
Programmable input bandwidth/sampling rates
CRC error checking on data interface
Daisy-chaining
Linear phase digital filter
Low latency sinc5 filter Wideband brick wall filter: ±0.005 dB pass-band ripple to 102.4 kHz
Analog input precharge buffers
Power supply
AVDD1 = 5.0 V, AVDD2 = 2.25 V to 5.0 V
IOVDD = 2.5 V to 3.3 V or IOVDD = 1.8 V
Temperature range: −40°C to +105°C

 

APLICACIONES

Data acquisition systems: USB/PXI/Ethernet
Instrumentation and industrial control loops
Audio testing and measurement
Vibration and asset condition monitoring
3-phase power quality analysis
Sonar
EEG/EMG/ECG