概要

The MAX30208 operates from a 1.7V to 3.6V supply voltage, and is a low-power, high-accuracy digital temperature sensor with ±0.1°C accuracy from +30°C to +50°C and ±0.15°C accuracy from 0°C to +70°C. The MAX30208 has 16-bit resolution (0.005°C).

The device uses a standard I2C serial interface to communicate with a host controller. Two GPIO pins are available. GPIO1 can be configured to trigger a temperature conversion, while GPIO0 can be configured to generate an interrupt for selectable status bits.

The MAX30208 includes a 32-word FIFO for the temperature data and also includes high and low threshold digital temperature alarms. The device is available in a 2mm x 2mm x 0.75mm, 10-pin Thin LGA package.

 

アプリケーション

Wearable Body Temperature Monitors

Medical Thermometers

Internet of Things (IoT) Sensors

 

詳細

The MAX30208 temperature sensor measures temperature with ±0.1°C accuracy over a +30°C to +50°C temperature range and ±0.15°C accuracy over a 0°C to +70°C temperature range. The device communicates over a standard I2C interface with serial data (SDA) and serial clock (SCL) lines to read the FIFO, which contains up to 32, 2-byte temperature readings. The device operates properly over a -40°C to +85°C temperature range without any damage.

In addition to the FIFO, the memory mapped registers contain high-alarm and low-alarm trigger registers and a temperature sensor setup register. The temperature sensor provides a 16-bit ADC. The Alarm High, Alarm Low, and Setup registers are volatile, and do not retain data when the device is powered down.

The MAX30208 has two GPIO pins. The default state of the GPIO pins at powerup determines the 2 LSBs in the I2C address of the device. GPIO1 allows for an optional external convert temperature trigger while GPIO0 can be configured as an interrupt for selectable status bits.

 

FIFO_A_FULL (address 0x09), FIFO Almost Full

The FIFO_A_FULL[4:0] field in the FIFO Configuration 1 [0x09] register sets the watermark for the FIFO and determines when the A_FULL bit in the STATUS [0x00] register is asserted. The A_FULL bit is set when the FIFO contains 32 minus FIFO_A_FULL[4:0] words. For example, when FIFO_A_FULL is set to 2, the flag is set when the 30th word is written to the FIFO. When the FIFO almost full condition is met, the A_FULL bit is asserted in the STATUS register. If the A_FULL_EN bit in the INTERRUPT_ENABLE [0x01] register is set and GPIO0_MODE = 0x3 in the GPIO_SETUP [0x20] register, then the interrupt is asserted on the GPIO0 pin.

This condition should prompt the applications processor to read samples from the FIFO before it fills.The bus master can read both the FIFO_WR_PTR and FIFO_RD_PTR to calculate the number of words available in the FIFO, or read the OVF_COUNTER and FIFO_DATA_COUNT registers, and read as many words as needed to empty the FIFO.

 

FIFO_RO (address 0x0A), FIFO Rollover

The FIFO_RO bit in the FIFO Configuration 2 [0x0A] register determines whether a sample is pushed onto the FIFO or discarded when it is full. If FIFO_RO is enabled when FIFO is full, old samples are overwritten. If FIFO_RO is not set, the new sample is discarded and the FIFO is not updated.

 

A_FULL_TYPE (address 0x0A),Almost Full Type

The A_FULL_TYPE bit defines the behavior of the A_FULL status bit. If the A_FIFO_TYPE bit is set low, the A_FULL status bit is asserted when the A_FULL condition is detected and cleared by a STATUS register read, then reasserts for every sample if the A_FULL condition persists. If the A_FIFO_TYPE bit is set high, the A_FULL status bit is asserted only when a new A_FULL condition is detected. The status bit is cleared by a STATUS register read and does not reassert for every sample until a new A_FULL condition is detected.