FEATURES

Attenuation range: 0.5 dB LSB steps to 31.5 dB

Low insertion loss

1.1 dB at 1 GHz

1.3 dB at 2 GHz

Typical step error: less than ±0.1 dB

Excellent attenuation accuracy

Safe state transitions

High linearity

Input 0.1dB compression (P0.1dB): 30 dBm typical

Input third-order intercept (IP3): 55 dBm typical

RF settling time (0.05 dB final RF output): 250 ns

Low phase shift error: 6° at 1 GHz

Single supply operation: 3.3 V to 5 V

ESD rating: Class 2 (2 kV HBM)

24-lead, 4 mm × 4 mm LFCSP package: 16 mm2

Pin compatible to the HMC624A

APPLICATIONS

Cellular infrastructure

Microwave radios and very small aperture terminals (VSATs)

Test equipment and sensors

IF and RF designs

 

GENERAL DESCRIPTION

The HMC1122 is a 6-bit digital attenuator operating from 0.1 GHz to 6 GHz with a 31.5 dB attenuation control range in 0.5 dB steps.

The HMC1122 is implemented in a silicon process, offering very fast settling time, low power consumption, and high ESD robustness. The device features safe state transitions and optimized for excellent step accuracy and high linearity over frequency and temperature range. The RF input and output are internally matched to 50 Ω and do not require any external matching components. The design is bidirectional; therefore, the RF input and output are interchangeable. The HMC1122 operates on a single supply ranging from 3.3 V to 5 V with no performance change due to an on-chip regulator.The device incorporates a driver that provides both serial and parallel control of the attenuator. The device also features a userselectable power-up state and a serial output port for cascading other serial controlled components.

The HMC1122 comes in a RoHS compliant, compact, 4 mm × 4 mm LFCSP package, and is pin compatible to the HMC624A. A fully populated evaluation board is available.

 

THEORY OF OPERATION

The HMC1122 incorporates a 6-bit fixed attenuator array that offers an attenuation range of 31.5 dB in 0.5 dB steps. An integrated driver enables both serial and parallel mode control of the attenuator array.

 

POWER SUPPLY

The HMC1122 requires a single dc voltage applied to the VDD pin. The ideal power-up sequence is as follows:

  1. Connect the GND pin to a ground reference.
  2. Apply a supply voltage to the VDD pin.
  3. Power up the digital control inputs. The relative order of the digital control inputs is not important.
  4. Apply an RF input signal to ATTIN or ATTOUT.

 

RF INPUT AND OUTPUT

The attenuator in the HMC1122 is bidirectional; ATTIN and ATTOUT pins are interchangeable as the RF input and output ports. The attenuator is internally matched to 50 Ω at both the input and the output; therefore, no external matching components are required. RF pins are dc-coupled; therefore, dc blocking capacitors are required on the RF lines.

 

SERIAL OR PARALLEL MODE SELECTION

The HMC1122 can be controlled in either serial or parallel mode by setting the P/S pin to high or low, respectively.

 

SERIAL MODE INTERFACE

The HMC1122 has a 3-wire serial peripheral interface (SPI): serial data input (SERIN), clock (CLK), and latch enable (LE). The serial control interface is activated when P/S is set to high.

In serial mode, the 6-bit SERIN data is clocked MSB first on the rising CLK edges into the shift register and then LE must be toggled high to latch the new attenuation state into the device. LE must be set to low to clock new 6-bit data into the shift register because CLK is masked to prevent the attenuator value from changing if LE is kept high.

The HMC1122 also features a serial data output pin, SEROUT, that outputs serial input data delayed by six clock cycles to control the cascaded attenuator using a single SPI bus. In serial mode operation, the parallel control inputs must always be kept at a valid logic level (VIH or VIL) and not be left floating. It is recommended to connect all parallel control inputs (D0 to D5) to ground.