GENERAL DESCRIPTION

The HMC903LP3E is a self biased, gallium arsenide (GaAs), monolithic microwave integrated circuit (MMIC), pseudomorphic (pHEMT), low noise amplifier (LNA) with an option bias control for IDQ reduction. It is housed in a 16-lead, 3 mm × 3 mm, LFCSP package. The HMC903LP3E amplifier operates from 6 GHz to 17 GHz, providing 18.5 dB of small signal gain and 1.7 dB noise figure in the 6 GHz to 16 GHz band, and an output IP3 of 25 dBm full band 6 GHz to 17 GHz, while requiring only 80 mA from a 3.5 V supply.

The P1dB output power of 14.5 dBm enables the LNA to function as a local oscillator (LO) driver for balanced, I/Q or image reject mixers. The HMC903LP3E also features an input and an output that are dc blocked and internally matched to 50 Ω, making it ideal for high capacity microwave radios and video satellite (VSAT) applications.

 

FEATURES

Low noise figure: 1.7 dB typical at 6 GHz to 16 GHz

High gain: 18.5 dB typical at 6 GHz to 16 GHz

Output power for 1 dB compression (P1dB): 14.5 dBm typical at 6 GHz to 16 GHz

Single-supply voltage: 3.5 V at 80 mA typical

Output third-order intercept (IP3): 25 dBm typical

50 Ω matched input/outputETRETR

Self biased with optional bias control for I DQ reduction

16-lead, 3 mm × 3 mm, LFCSP package

 

APPLICATIONS

Point to point radios

Point to multipoint radios

Military and space

Test instrumentation

 

THEORY OF OPERATION

THEORY OF OPERATION The HMC903LP3E is a gallium arsenide (GaAs), monolithic microwave integrated circuit (MMIC), pseudomorphic (pHEMT), low noise amplifier. The HMC903LP3E amplifier uses two gain stages in series, and the basic schematic of the amplifier , which forms a low noise amplifier operating from 6 GHz to 17 GHz with excellent noise figure performance.

The HMC903LP3E has single-ended input and output ports whose impedances are nominally equal to 50 Ω over the 6 GHz to 17 GHz frequency range. Consequently, it can directly insert into a 50 Ω system with no required impedance matching circuitry, which also means that multiple HMC903LP3E amplifiers can be cascaded back to back without the need for external matching circuitry.

The input and output impedances are sufficiently stable vs. variations in temperature and supply voltage that no impedance matching compensation is required.

Note that it is critical to supply very low inductance ground connections to the GND pins and to the package base exposed pad to ensure stable operation. To achieve optimal performance from the HMC903LP3E and to prevent damage to the device, do not exceed the absolute maximum ratings.

 

APPLICATIONS INFORMATION

The basic connections for operating the HMC903LP3E. Both the RFIN and RFOUT ports have on-chip dc block capacitors that eliminate the need for external ac coupling capacitors.

The HMC903LP3E has VGG1 and VGG2 optional gate bias pins. When these pins are left open, the amplifier runs in self biased operation with a typical IDQ = 80 mA, when VDD1 /VDD2 = 3.5 V. When using the VGG1 and VGG2 gate bias pins, follow the recommended bias sequencing so that the amplifier is not damaged.

RECOMMENDED BIAS SEQUENCE DURING POWER UP

The recommended bias sequence to power up the HMC903LP3E is as follows:

  1. Connect to GND.
  2. Set VGG1 and VGG2 to −2 V.

3.Set VDD1 and VDD2 to 3.5 V.

  1. Increase VGG1 and VGG2 to achieve a typical IDQ = 80 mA.
  2. Apply the RF signal.

RECOMMENDED BIAS SEQUENCE DURING POWER DOWN

The recommended bias sequence to power down the HMC903LP3E is as follows:

  1. Turn off the RF signal.
  2. Decrease VGG1 and VGG2 to −2 V to achieve a typical IDQ = 0 mA.
  3. Decrease VDD1 and VDD2 to 0 V.
  4. Increase VGG1 and VGG2 to 0 V.

Unless otherwise noted, all measurements and data shown were taken using the typical application circuit, with the evaluation board  and biased per the conditions in this section. The VDD1 and VDD2 pins are connected together; similarly, the VGG1 and VGG2 pins are also connected together. The bias conditions shown in this section are the operating points recommended to optimize the overall performance. Operation using other bias conditions may provide performance that differs from what is shown in this data sheet.