General Description

The MXD1810–MXD1813/MXD1815–MXD1818 family of microprocessor (μP) reset circuits monitor power supplies in μP and digital systems. These devices provide excellent circuit reliability and low cost by eliminating external components and adjustments when used with +2.5V/+3.0V/+3.3V (MXD1815–MXD1818), and +5V (MXD1810–MXD1813) systems.

These circuits assert a reset signal whenever the VCC supply voltage declines below a preset threshold, keeping reset asserted for at least 100ms after VCC rises above the reset threshold. The MXD1813/MXD1818 also keep reset asserted for at least 100ms after the output is momentarily pulled to GND by an external pushbutton switch.

The MXD1812/MXD1817 have an active-high push pull RESET output. The MXD1810/MXD1815 (pushpull) and MXD1811/MXD1813/MXD1816/MD1818 (open drain) have an active-low RESET output. The open-drain devices (MXD1811/MXD1813/MXD1816/MXD1818) have an internal pullup resistor to VCC. The MXD1813/MXD1818 feature a debounced manual-reset feature that

asserts a reset if the RESET pin is pulled low for more than 1.5μs. When used to initiate manual reset, RESET debounces signals from devices such as mechanical switches. For devices with this feature, the release of the external switch triggers the reset period.

The MXD1810–MXD1813/MXD1815–MXD1818 are guaranteed to output the correct logic state for VCC down to +1V. These ICs provide a reset comparator designed to ignore fast transients on VCC. Reset thresholds are available between +2.18V and +4.62V. These small, low-power (4μA) devices are ideal for use in portable equipment. All are available in space-saving 3-pin SC70 and SOT23 packages, and are specified from -40°C to +105°C.

 

RESET/RESET Output

A microprocessor’s (μP’s) reset input starts the microprocessor in a known state. The MXD1810–MXD1813/MXD1815–MXD1818 μP supervisory circuits assert reset to prevent code-execution errors during power-up, power down, and brownout conditions. Whenever VCC falls below the reset threshold, the reset output asserts. Once VCC exceeds the reset threshold, an internal timer keeps the reset output asserted for the specified reset timeout period (tRP). Reset is also triggered by an externally initiated rising edge on the RESET pin (MXD1813/MXD1818), following a low signal of 1.5μs minimum duration.

Push-Button Reset (MXD1813/MXD1818)

Many μP-based products require push-button reset capability , allowing the operator, a test technician, or external logic circuitry to initiate reset.

On the MXD1813/MXD1818, a logic-low on RESET held for greater than 1.5μs asserts a reset. RESET deasserts following a 100ms minimum reset timeout delay (tPBRST). A manual-reset input shorter than 1.5μs may release RESET without the 100ms minimum reset timeout delay. To facilitate use with mechanical switches, the MXD1813/MXD1818 contain internal debouncing circuitry.

 

Interfacing to μPs with Bidirectional Reset Pins

Since the RESET output on the MXD1811/MXD1816 is open drain, these devices interface easily with μPs that have bidirectional reset pins, such as the Motorola 68HC11. Connecting the μP supervisor’s RESET output directly to the microcontroller’s (μC’s) RESET pin allows either device to assert reset . No external pullup resistor is required, as it is contained within the MXD1811/MXD1816.

 

Negative-Going VCC Transients

In addition to issuing a reset to the μP during power-up, power-down, and brownout conditions,these devices are relatively immune to short-duration, negative-going VCC transients (glitches).

The Typical Operating Characteristics show the Maximum Transient Duration vs. Reset Threshold Overdrive for which reset pulses are not generated. The graph shows the maximum pulse width that a negative-going VCC transient may typically have without issuing a reset signal. As the amplitude of the transient increases, the maximum allowable pulse width decreases.

Ensuring a Valid Reset Output Down to VCC = 0

When VCC falls below the minimum operating voltage, push-pull-structured reset sinking (or sourcing) capabilities decrease dramatically. High-impedance CMOSlogic inputs connected to the RESET/RESET pin can drift to indeterminate voltages. This does not present a problem in most cases, since most μPs and circuitry do not operate at VCC below +1V. For MXD1810/MXD1815 applications where RESET must be valid down to VCC = 0, adding a pulldown resistor between RESET and GND removes stray leakage currents, holding RESET low .